// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T1 Processor File: cpu_exec1.cc
// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
// 
// The above named program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public
// License version 2 as published by the Free Software Foundation.
// 
// The above named program is distributed in the hope that it will be 
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
// General Public License for more details.
// 
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
// 
// ========== Copyright Header End ============================================
#include "bcore/InstructionEmulator.h"
#include "InstructionWord.h"
#include "V9/V9_ArchState.h"
#include "Hv/Hv_ArchState.h"

/* This routine executes an OP 1 instruction (CALL). */

using namespace std;
using namespace Riesling;

bool InstructionEmulator::exec_op1( InstructionWord &i )
{
    ctiTaken_ = true;

    // checkTrapBeforeCommit(i);

    if (!pstate_tct_enabled_)
    {
        ctiExec_  = true;
    
        uint64_t instr_pc = as_->getPc();
        int32_t  disp     = i.disp30() << 2;
        int64_t  delta    = disp;	

        as_->setPc( as_->getNpc() );
        as_->setNpc( instr_pc + delta );
        ireg_->set( o7, instr_pc );
    }
    return true;
}
